The reduction in pixel pitch in a CMOS image sensor has been advanced for various reasons. In order to reduce the pixel pitch, pixels are arranged in a diced (staggered) fashion, and a plurality of photoelectric conversion elements (photodiodes) share an output circuit comprising a reset transistor and an amplifying transistor (hereinafter referred to as “pixel sharing”). Furthermore, a select transistor is dispensed with. In order to reduce the pixel pitch, other measures have been taken.
The pixel arrangement of the CMOS sensor, in which the above-described pixel sharing is implemented and CMOS image sensors are disposed in a diced fashion, is equal to an arrangement of repetitive units in which conventional Bayer-arranged color filters of three primary colors (R, G, B) are disposed in units of four pixels of 2×2. Thus, no periodical irregularity occurs due to a difference in repetitive arrangement. Specifically, two G pixels (Gr, Gb) in the Bayer arrangement are disposed in a diced fashion, like the pixel arrangement. Thus, the layout of the G pixels (Gr, Gb) is the same as the layout of the pixel arrangement, and no irregularity occurs due to the arrangement of the two G pixels. It is known, therefore, that the variance in fabrication can be suppressed, exact color signals can be output in accordance with images, and exact image color signals can be sent to a rear-stage color signal processing circuit.